/*
 * gpio-pxa.S - gpio setup for PXA architecture
 *
 * $Id: gpio.S,v 1.1 2008/04/14 02:17:50 yuxu Exp $
 *
 * Copyright (C) 2003 Abraham van der Merwe <abz@4dllc.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#define __ASSEMBLY__
#include <arch.h>

.text

.globl xlli_GPIO_init
.global xlli_MFPR_init
.global xlli_MFPR_offset_table

xlli_GPIO_init:
  stmfd   sp!,    {r0-r2, lr}             @ Save r0-r2, & link on stack
    ldr     r0,     =0x40E00000    @ GPIO regs base address
@
@       Set any GPIOs that should be HIGH after GPIOs are configured.
@
        ldr     r1,     =0x00000000       @ Set bits for GPSR0
        str     r1,     [r0, #0x018]@ GPIOs 31:0

        ldr     r2,     =0x00000000       @ Set bits for GPSR1
        str     r2,     [r0, #0x01C]@ GPIOs 63:32

        ldr     r1,     =0x00000000       @ Set bits for GPSR2
        str     r1,     [r0, #0x020]@ GPIOs 95:64

        ldr     r2,     =0x00000000       @ Set bits for GPSR3
        str     r2,     [r0, #0x118]@ GPIOs 127:96
@
@       Set any GPIOs that should be LOW after GPIOs are configured.
@
        ldr     r1,     =0xFFFFFFFF       @ Set bits for GPCR0
        str     r1,     [r0, #0x024]@ GPIOs 31:0

        ldr     r2,     =0xFFFFFFFF       @ Set bits for GPCR1
        str     r2,     [r0, #0x028]@ GPIOs 63:32

        ldr     r1,     =0xFFFFFFFF       @ Set bits for GPCR2
        str     r1,     [r0, #0x02C]@ GPIOs 95:64

        ldr     r2,     =0xFFFFFFFF       @ Set bits for GPCR3
        str     r2,     [r0, #0x124]@ GPIOs 127:96
@
@       Set up GPIO direction registers.
@
        ldr     r1,     =0x00010000       @ Direction values for GPDR0
        str     r1,     [r0, #0x00C]@ GPIOs 31:0

        ldr     r2,     =0x00000000       @ Direction values for GPDR1
        str     r2,     [r0, #0x010]@ GPIOs 63:32

        ldr     r1,     =0x00000000       @ Direction values for GPDR2
        str     r1,     [r0, #0x014]@ GPIOs 95:64

        ldr     r2,     =0x00000800       @ Direction values for GPDR3
        str     r2,     [r0, #0x10C]@ GPIOs 127:96
@
@       GPIO Setup complete
@
        ldmfd   sp!,    {r0-r2, pc}     @ Return to caller (via stack)


xlli_MFPR_init:
    @ If stack pointer has been defined
        stmfd   sp!,    {r0-r4, lr}             @ Save r0-r4, & link on stack
@
@       Set all GPIO Multi Function Pin Registers (MFPRxx) to the values set
@       by the include file referenced in the code below. Since offsets to
@       MFPRs are not in a linear sequence, an offset lookup table below) is used.
@
        ldr     r0,     =0x40E10000@ MFPR base address
        add     r4,     pc,     #xlli_MFPR_data - (.+8)         @ Address of data for MFPR settings 
@
@       The 4 line code segment below is a workaround for the commented out
@       line of code above. (Assembler bug - 8-Feb-05)
@
        ldr     r2,     =xlli_MFPR_offset_table @ Address of MFPR offset table   
        ldr     r3,     =xlli_MFPR_data         @ Address of MFPR data
        sub     r2,     r3,     r2              @ Calculate distance between the two
        sub     r2,     r4,     r2              @ R2 now contains address of the table
@
xlli_m0: ldrh    r3,     [r2],   #2              @ Get next offset value
        cmp     r3,     #0                      @ At end of table?
        beq     xlli_m1                         @ Branch if end of table <Offset = Zero>
        ldr     r1,     [r4],   #4              @ Fetch MFPR data from user table (below)
        str     r1,     [r0, r3]                @ Write MFPR data to MFPR
        b       xlli_m0                         @ Get next offset        
@
@       Perform a readback & return to caller
@
xlli_m1: sub     r2,     r2,     #2      @ Point back to MFPR for last table entry
        ldrhs   r3,     [r2]            @ Get the last offset value
        ldr     r4,     [r0, r3]        @ Read back to insure writes are complete

        ldmfd   sp!,    {r0-r4, pc}             @ Return to caller via stack

xlli_MFPR_offset_table:                                                          @        GPIOs
        .align 1
        .short     0x0B4,  0x0B8,  0x0BC,  0x27C,  0x280,  0x284,  0x288,  0x28C   @ MFPRs   0->7
        .align 1
        .short     0x290,  0x294,  0x298,  0x29C,  0x2A0,  0x2A4,  0x2A8,  0x2AC   @ MFPRs   8->15
        .align 1
        .short     0x2B0,  0x2B4,  0x2B8,  0x2BC,  0x2C0,  0x2C4,  0x2C8,  0x2CC   @ MFPRs  16->23
        .align 1
        .short     0x2D0,  0x2D4,  0x2D8,  0x400,  0x404,  0x408,  0x40C,  0x410   @ MFPRs  24->31
        .align 1
        .short     0x414,  0x418,  0x41C,  0x420,  0x424,  0x428,  0x42C,  0x430   @ MFPRs  32->39
        .align 1
        .short     0x434,  0x438,  0x43C,  0x440,  0x444,  0x448,  0x44C,  0x450   @ MFPRs  40->47
        .align 1
        .short     0x454,  0x458,  0x45C,  0x460,  0x464,  0x468,  0x46C,  0x470   @ MFPRs  48->55
        .align 1
        .short     0x474,  0x478,  0x47C,  0x480,  0x484,  0x488,  0x48C,  0x490   @ MFPRs  56->63
        .align 1
        .short     0x494,  0x498,  0x49C,  0x4A0,  0x4A4,  0x4A8,  0x4AC,  0x4B0   @ MFPRs  64->71
        .align 1
        .short     0x4B4,  0x4B8,  0x4BC,  0x4C0,  0x4C4,  0x4C8,  0x4CC,  0x4D0   @ MFPRs  72->79
        .align 1
        .short     0x4D4,  0x4D8,  0X4DC,  0X4E0,  0x4E4,  0x4E8,  0x4EC,  0x4F0   @ MFPRs  80->87
        .align 1
        .short     0x4F4,  0x4F8,  0x4FC,  0x500,  0x504,  0x508,  0x50C,  0x510   @ MFPRs  88->95
        .align 1
        .short     0x514,  0x581,  0x51C,  0x600,  0x604,  0x608,  0x60C,  0x610   @ MFPRs  96->103
        .align 1
        .short     0x614,  0x618,  0x61C,  0x620,  0x624,  0x628,  0x62C,  0x630   @ MFPRs 104->111
        .align 1
        .short     0x634,  0x638,  0x63C,  0x640,  0x644,  0x648,  0x64C,  0x650   @ MFPRs 112->119
        .align 1
        .short     0x654,  0x658,  0x65C,  0x660,  0x664,  0x668,  0x66C,  0x670   @ MFPRs 120->127
        .align 1
        .short     0x674,  0x678,  0x2DC,  0x2E0,  0x2E4,  0x2E8,  0x2EC           @ MFPRs  0_2->6_2
        .align 1
        .short     0x000                           @ 0x000 marks the end of the table
        .align   2                               @ Insures 32-bit allignment
xlli_MFPR_data: 
        .align 2
        .word     0x0000A040      @ GPIO_0   - Pull Down Enabled
        .align 2
        .word     0x0000A041      @ GPIO_1   - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_2   - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_3   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_4   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_5   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_6   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_7   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_8   - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_9   - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_10  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_11  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_12  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_13  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_14  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_15  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_16  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_17  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_18  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_19  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_20  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_21  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_22  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_23  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_24  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_25  - Pull uP Enabled
        .align 2
        .word     0x0000A040      @ GPIO_26  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_27  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_28  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_29  - Pull Down Enabled
        .align 2
        .word     0x0000A042      @ GPIO_30  - Configured for FFUART_RXD
        .align 2
        .word     0x0000A042      @ GPIO_31  - Configured for FFUART_TXD

        .align 2
        .word     0x0000C040      @ GPIO_32  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_33  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_34  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_35  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_36  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_37  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_38  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_39  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_40  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_41  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_42  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_43  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_44  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_45  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_46  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_47  - Pull Up Enabled
        .align 2
        .word     0x0000C042      @ GPIO_48  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_49  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_50  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_51  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_52  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_53  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_54  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_55  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_56  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_57  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_58  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_59  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_60  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_61  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_62  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_63  - Pull Up enabled

        .align 2
        .word     0x0000A040      @ GPIO_64  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_65  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_66  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_67  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_68  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_69  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_70  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_71  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_72  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_73  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_74  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_75  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_76  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_77  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_78  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_79  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_80  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_81  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_82  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_83  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_84  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_85  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_86  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_87  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_88  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_89  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_90  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_91  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_92  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_93  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_94  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_95  - Pull Down Enabled

        .align 2
        .word     0x0000A040      @ GPIO_96  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_97  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_98  - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_99  - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_100 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_101 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_102 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_103 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_104 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_105 - Pull Up Enabled
        .align 2
        .word     0x0000C040      @ GPIO_106 - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_107 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_108 - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_109 - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_110 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_111 - Pull Down Enabled
        .align 2
        .word     0x0000C040      @ GPIO_112 - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_113 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_114 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_115 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_116 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_117 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_118 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_119 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_120 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_121 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_122 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_123 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_124 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_125 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_126 - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_127 - Pull Down Enabled
@
        .align 2
        .word     0x0000C040      @ GPIO_0_2  - Pull Up Enabled
        .align 2
        .word     0x0000A040      @ GPIO_1_2  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_2_2  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_3_2  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_4_2  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_5_2  - Pull Down Enabled
        .align 2
        .word     0x0000A040      @ GPIO_6_2  - Pull Down Enabled

@
@       EMPI MFPRs (Configured by boot ROM?)
@
        .align 2
        .word     0x0000A040      @ DF_IO0
        .align 2
        .word     0x0000A040      @ DF_IO1
        .align 2
        .word     0x0000A040      @ DF_IO2
        .align 2
        .word     0x0000A040      @ DF_IO3
        .align 2
        .word     0x0000A040      @ DF_IO4
        .align 2
        .word     0x0000A040      @ DF_IO5
        .align 2
        .word     0x0000A040      @ DF_IO6
        .align 2
        .word     0x0000A040      @ DF_IO7
        .align 2
        .word     0x0000A040      @ DF_IO8
        .align 2
        .word     0x0000A040      @ DF_IO9
        .align 2
        .word     0x0000A040      @ DF_IO10
        .align 2
        .word     0x0000A040      @ DF_IO11
        .align 2
        .word     0x0000A040      @ DF_IO12
        .align 2
        .word     0x0000A040      @ DF_IO13
        .align 2
        .word     0x0000A040      @ DF_IO14
        .align 2
        .word     0x0000A040      @ DF_IO15

        .align 2
        .word     0x0000A040      @ DF_ADDR0
        .align 2
        .word     0x0000A040      @ DF_ADDR1
        .align 2
        .word     0x0000A040      @ DF_ADDR2
        .align 2
        .word     0x0000A040      @ DF_ADDR3
@
        .align 2
        .word     0x0000A040      @ DF_SCLK_E
        .align 2
        .word     0x0000A040      @ nBE0
        .align 2
        .word     0x0000A040      @ nBE1
        .align 2
        .word     0x0000A040      @ DF_nADV2_ALE
        .align 2
        .word     0x0000A040      @ DF_INT_RnB
        .align 2
        .word     0x0000A040      @ DF_nCS0
        .align 2
        .word     0x0000A040      @ DF_nCS1
        .align 2
        .word     0x0000A040      @ DF_nWE
        .align 2
        .word     0x0000A040      @ DF_nRE_nOE
        .align 2
        .word     0x0000A040      @ nLUA
        .align 2
        .word     0x0000A040      @ nLLA

